ATML – AVR AT Tiny 2313

Special Microcontroller Features

  • – debugWIRE On-chip Debugging
  • – In-System Programmable via SPI Port
  • – External and Internal Interrupt Sources
  • – Low-power Idle, Power-down, and Standby Modes
  • – Enhanced Power-on Reset Circuit
  • – Programmable Brown-out Detection Circuit
  • – Internal Calibrated Oscillator



Product Description

The ATML – AVR AT Tiny 2313 is a low-power CMOS 8-bit micro-controller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATML – AVR AT Tiny 2313 achieves through puts approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. ATML – AVR AT Tiny 2313, micro-controller ,AVR AT Tiny 2313, has different names.

ATML – AVR AT Tiny 2313, micro-controller ,AVR AT Tiny 2313,

ATML – AVR AT Tiny 2313 has best price in Embeded Studio. AT tiny High Performance, Low Power AVR® 8-Bit Microcontroller. The ATtiny2313 provides the following features: 2K bytes of In-System Programmable Flash, 128 bytes EEPROM, 128 bytes SRAM, 18 general purpose I/O lines, 32 general purpose working registers, a single-wire Interface for On-chip Debugging, two flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, Universal Serial Interface with Start Condition Detector, a programmable Watchdog Timer with internal Oscillator, and three software selectable power saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, and interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware reset. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up combined with low-power consumption.

ATML – AVR AT Tiny 2313, micro-controller ,AVR AT Tiny 2313,

ATML – AVR AT Tiny 2313, micro-controller

Advanced RISC Architecture

  • – 120 Powerful Instructions
  • – Most Single Clock Cycle Execution
  • – 32 x 8 General Purpose Working Registers
  • – Fully Static Operation
  • – Up to 20 MIPS Throughput at 20 MHz

Data and Non-volatile Program and Data Memories

  • – 2/4K Bytes of In-System Self Programmable Flash
  • – 128/256 Bytes In-System Programmable EEPROM
  • – 128/256 Bytes Internal SRAM
  • – Programming Lock for Flash Program and EEPROM Data Security

Peripheral Features

  • – One 8-bit Timer/Counter with Separate Prescaler and Compare Mode
  • – One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes
  • – Four PWM Channels
  • – On-chip Analog Comparator
  • – Programmable Watchdog Timer with On-chip Oscillator
  • – USI – Universal Serial Interface
  • – Full Duplex USART

Industrial Temperature Range: -40°C to +85°C

Operating Voltage – 1.8 – 5.5V

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