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1. Adopt cy7c68013a-56 chip: low-power version, enhanced 51 core, 16KB program data area, 48Mhz main frequency, 480Mbps high-speed transmission protocol standard, which is in conformity with USB2.0 specification and downward compatible with USB1.1.
2. Firmware EEPROM: the complete system programming scheme is used to download firmware programs directly using USB cable. The board provides 16K (24LC128) large-capacity program memory (EEPROM), which is used to store VID/PID and USB firmware, meeting the program space requirements of CY7C68013A.
3. All GPIO are introduced through 2.54mm standard needle discharge, which is greatly convenient for learners to extend the design by themselves.
4. With the corresponding firmware, the functions of the logic analyzer can be realized through the core board.
5. Provide schematic diagram in PDF format and relevant source code.
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